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- Parallel Success Starts With Proper Planning“Measure twice; cut once.” That maxim of carpentry is also good advice for parallel programming, according to a recent technical paper...
- Best, Brightest Parallel Students Work for “Betterment of Life on Earth”Who will help create the next-generation of faster, higher resolution parallel computing models to help counter climate change, global warming and...
- Wanted: Energy-Efficient SupercomputersWho says super-fast computing has to be energy-wasting computing? That challenging question is at the core of a discussion workshop on...
- Data Deluge Bottlenecking BreakthroughsData complexity and lack of scalability of underlying algorithms is bottlenecking the nation’s ability to analyze and apply massive amounts of...
- Barcelona Supercomputing Center Joins OpenMP boardBarcelona Supercomputing Center (BSC) has joined the OpenMP Architecture Review Board (ARB), a consortium of 24 vendors and research organizations creating...
- $1,734 Helps You Master Parallel UniverseMystified by aspects of parallel computing? You’re not alone. But take heart. Advance orders are being taken on Amazon.com for...
Embedded, Parallel Worlds Converging
HPC Drives Life Science Research at Texas Supercomputing Center
Improving Your Coding AND Professional Craft
Meeting New Challenges of Scaling Parallelism Across and Within Cores
Parallel Platform Report: Believe it – Affordable HPC is Here
Xeon Phi Powers HPC Stampede
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- Parallel Success Starts With Proper Planning
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Blog Archive
Tutorial: Intel Parallel Processors Span Gamut
Performance increases in next-generation microprocessors no longer rely on cranking clock speeds–except during Turbo Boost. Instead, speed-ups today come from parallel programming harnessing multi-core hyper-threaded processors, spanning everything from tiny mobiles to massive supercomputers. In fact, all modern Intel central processing units (CPUs) are parallel processors–from the tiny Atom to …
From the Editor: 2013 Intel Software Conference and Go Parallel on Facebook
This year’s four-city educational tour kicks off March 5 with the theme “Let Performance Thrive.” The intensive one-day workshop explores the techniques and tools that can get your applications to market faster—and help increase performance and accuracy. This conference is designed for C, C++, and Fortran developers and is …
New “Must Read” on High Performance Parallel Programming
For more than two years Intel’s James Reinders and Jim Jeffers circled the globe, teaching and gathering real-life experiences and best practices into a foundational new book, Intel® Xeon Phi™ Coprocessor High Performance Programming. Go Parallel Editor Joe Maglitta sat down with Reinders to talk about the scope, challenges …
Water-Cooled Parallel Processors Use MIC
Water-cooled parallel processors based on Intel’s Many Integrated Core (MIC) architecture are boosting performance and cutting energy consumption in Russian research centers. Common to all the Russian parallel processors, including that of the previously announced Russian Academy of Sciences, is direct-liquid cooling of their Xeon and Xeon Phi cores …
Russian Supercomputer Adopts Xeon Phi
The Russian Academy of Science is aiming for the region’s fastest supercomputer in a joint effort with the Commonwealth of Independent States (CIS, formerly the Soviet Republics). By harnessing thousands of parallel Intel Xeon and Xeon Phi cores, the 10 petaFLOPS JSCC supercomputer will advance the frontiers of Soviet …
Dividing Data with Cilk Plus
If you’ve been following my articles, you know you can use Threading Building Blocks (TBB) with blocked ranges to divide work into parallel chunks. That works well with TBB. But what about Cilk Plus? Cilk Plus gives you less control over how your work is divided up. The tradeoff is …
Vector-Based and Deterministic Parallel Programming
In the latest installment of the series, Intel Principal Engineer and author Michael McCool explains the mechanisms for expressing vector parallelism, both explicitly and implicitly, and the central role of Intel’s CILK Plus. You’ll also better understand the distinction between determinism and non-determinism, and more. (5:30)
Facebook Redefines Data Centers, Parallel with Intel Photonics
The world’s largest datacenters at Facebook will leapfrog competition by redistributing parallel system resources into homogeneous racks, and use Intel’s next-generation silicon photonics to interconnect Xeon and Atom processor racks to into more energy-efficient, and less expensive storage and networking racks. “Intel is collaborating with Facebook to redefine the future …
Parallel Optimization: Patterns at the Chip Level
In the latest installment of the series, Intel Principal Engineer Michael McCool discusses best practices for implementing patterns, like Gather/Scatter from the top down, using Cilk Plus or TBB. (4:15)
Fast and Curious: 1,202-socket HPC powers Japan research
To meet growing demand for delivering high-speed supercomputer services to researchers across Japan, Kyoto University has deployed a cluster supercomputer based on Intel’s Xeon processor E5 family and featuring a 1,202-Socket Subsystem and high-memory-capacity Subsystem with 1.5TB per Node. As one of Japan’s national centers for shared access to …