ispc: Xeon and Xeon Phi Support Share your comment!

 

Intel’s James Reinders blogged recently about an industry-leading exploration project called ispc, an R&D compiler for a C-based language that is targeted for exploring the performance available from doing SPMD (single program, multiple data) computation on SIMD units found on CPUs and on Intel Xeon Phi coprocessors (using the Intel Many Integrated Core (MIC) architecture). James writes that ispc has delivered performance competitive with hand-coded SSE and AVX for a variety of graphics and throughput kernels, and typically delivers a 3x-4x speedup versus scalar C/C++ code on SSE and 5-7x speedup on AVX (for computations that are amenable to SPMD implementation), while still providing the ease-of-use of a C-like language.

To read the full blog post, click here.

http://software.intel.com/en-us/blogs/2012/07/27/ispc-xeon-and-xeon-phi-support-now/

Posted on by James Reinders (Intel®)
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