Intel QuickPath Interconnect Architecture Layer Overview
The Intel QPI architecture is defined to expand the logical and electrical capabilities, as well as to provide flexibility to add to and change the architecture as needed for future requirements. The architecture was also defined to address continuing signaling design and validation challenges. The focus of this article is to provide an introduction to the overall architectural hierarchy and layer definitions.
The Intel QPI architecture defines different logical layers, with specific functional responsibilities. The Intel QPI architecture layer hierarchy is illustrated in Figure 7.
Intel QPI agents are protocol entities that send/receive a specific type of protocol-level messages. Examples are caching agent, home agent, interrupt agent, etc. Agents are defined at the Protocol layer, and don’t have a Physical layer context. There can be multiple agents within a component. The Protocol layer implements the higher level communication protocol between different Intel QPI agents such as cache coherence (reads, writes, invalidations), ordering, peer to peer I/O, and interrupt delivery. The specific functionality of this layer depends on the platform architecture. The Protocol layer may be bypassed in pure routing agents, which results in low latency transfers from sender to receiver through the interconnection network.
The Routing layer provides a flexible and distributed way to route Intel QPI packets from a specific source to a destination based on the destination agent NodeID. It relies on the virtual channel and message class abstraction provided by the Link layer to specify one or more Intel QPI port and virtual network pairs to route the packet. The mechanism for routing is defined through implementation specific routing tables.
The Link layer separates the Physical layer from the upper layers and provides reliable data transfer and flow control between two directly connected Intel QPI agents. The Link layer provides virtualization of the physical channel into multiple virtual channels and message classes. The virtual channels can be viewed as multiple virtual networks for use by the Routing, Transport, and Protocol layers.
The Physical layer logical sub-block interfaces with the Link layer, and reformats the Link layer data flow control units (flits) to be provided to the electrical sub-block. The logical sub-block also re-formats the electrical sub-block physical data units (phits) into flits to transmit to the Link layer. This logical-layer function is transparent to the electrical sub-block and the Link layer, the Link layer not needing to be aware of the electrical sub-block behavior, and vice versa.
The layered architecture provides contextual separation between layers, which also allows a level of independence to changes within each layer, not affecting the other layer definitions. This contextual independence also applies to the Physical layer logical and Electrical sub-blocks.