Colfax Hands-On Webinar Series: Deep Dive into Performance Optimization Share your comment!


Free 20-hour webinar series includes parallel programming, performance optimization, remote access to advanced servers

Intel partner Colfax Research is offering a free 20-hour hands-on in-depth training on parallel programming and performance optimization in computational applications on Intel architecture. The first run in 2017 begins January 16, 2017. Broadcasts start at 17:00 UTC (9:00 am in San Francisco, 12:00 noon in New York, 5:00 pm in London, 8:00 pm in Moscow, 10:30 pm in New Delhi, 2:00 am in Tokyo).

Why Attend the HOW Series

Colfax offers free hands-on workshop “Parallel Programming and Optimization for Intel® Architecture”, also known as HOW Series “Deep Dive”. Workshops include 20 hours of Web-based instruction and up to 2 weeks of remote access to dedicated training servers for hands-on exercises. These trainings are free to everyone thanks to Intel’s sponsorship. Here is what the HOW Series training will deliver for you:

The Web-based HOW Series training provides extensive knowledge needed to extract more of the parallel compute performance potential found in both Intel® Xeon® and Intel® Xeon Phi™ processors and coprocessors. Course materials and practical exercises are appropriate for developers beginning their journey to parallel programming, with enough detail to also cater to high-performance computing experts.

The HOW series is an experiential learning program because you get to see code optimization performed live and also get to practice it with your own hands. The workshop consists of instructional and hands-on self-study components:

The instructional part of each workshop consists of 10 lecture sessions. Each session presents 1 hour of theory and 1 hour of practical demonstrations. Lectures can be viewed live by joining live broadcast, or offline as streaming video.

Receive Certificate

Attendees of these workshops may receive a certificate of completion. The certificate states the Fundamental level of accomplishment in the Parallel Programming Track. Attending at least 6 out of 10 live broadcast sessions is required to receive the certificate. Certificates are delivered via email within 7 days after the last webinar.

Remote Access for Hands-On Exercises

All registrants will receive remote access to a cluster of training servers. The compute nodes in the cluster are based on Intel Xeon Phi x200 family processors (formerly KNL), and additional nodes with Intel Xeon processors and Intel Xeon Phi coprocessors (KNC) are available. Intel software development tools are provided on the cluster under the Evaluation license.

Schedule of Sessions

  • Jan 16, 2017: Intel Architecture and Modern Code
  • Jan 17, 2017: Xeon Phi, Coprocessors, Omni-Path
  • Jan 18, 2017: Expressing Parallelism with Vectors
  • Jan 19, 2017: Multi-threading with OpenMP
  • Jan 20, 2017: Optimization Overview: N-body
  • Jan 23, 2017: Scalar Tuning, Vectorization
  • Jan 24, 2017: Common Multi-threading Problems
  • Jan 25, 2017: Multi-Threading, Memory Aspect
  • Jan 26, 2017: Access to Caches and Memory
  • Jan 27, 2017: Distributed Computing, MPI

Click here to register for the workshop

Posted on January 11, 2017 by Michael Krieger, Go Parallel Managing Editor